Carrier recovery includes synchronizing received signals to a reference. In many systems this is performed using phase-locked loops (PLL). In digital systems, a digital phase-locked loop (DPLL) is employed which may address a plurality of different issues including phase shift as well as noise considerations. In many systems, as the DPLL loop bandwidth is increased in a digital carrier recovery system, residual phase jitter due to phase noise on the signal is reduced as the DPLL can better track the signal phase noise. However, as DPLL loop bandwidth is increased, more and more additive noise, e.g., white Gaussian noise, enters the carrier recovery loop and causes more residual phase jitter.
In general, for a given condition of phase and additive noise, there may exist a loop bandwidth where the overall residual phase jitter is minimized. In current practice, the carrier recovery loop bandwidth is set to some nominal value based upon expected signal conditions. This results in a suboptimal loop bandwidth and unnecessarily large residual phase jitter following carrier recovery.
Accordingly, there is a need for a system and method, which optimizes loop bandwidth to provide minimum phase jitter responsive to the current signal conditions.